NXP

NXP


LPC2900

Targets: Automotive, Communication & Wired, General Purpose, Industrial, Medical, Motor Control, Security, Test & Measurement

NXP LPC2900 Block Diagram

NXP's LPC2900 series, built around an ARM968E-S core, is part of the LPC2000 family and features two CAN interfaces and two LIN masters, standard serial buses, plus a sophisticated PWM and up to three ADCs. The LPC29xx devices have 32-bit external memory controllers that support static memory devices, including RAM, ROM, Flash, burst ROM, and external I/O devices. The series has up to 768-kbyte of on-chip Flash and 80-kbyte of SRAM, which is subdivided into a 16-kbyte Tightly Coupled Memory (TCM) for data and 16-kbyte TCM for code as well as 56-kbyte general purpose SRAM.

The integrated CAN 2.0B controllers offer FullCAN mode for message reception, triple transmit buffers with automatic priority scheduling and extensive global CAN-acceptance filtering for high-performance gateway functionality. A USB 2.0 Full-Speed Host/OTG/Device interface is also available.

For compatibility with existing tools, each device uses the standard ARM test/debug JTAG interface. The LPC2900 series fills the performance gap between the LPC2000 ARM7TDMI and LPC3000 ARM926EJ processors.