imec's (Interuniversity Microelectronic Centre) flexible ADRES (architecture for dynamically reconfigurable embedded system) consists of a tightly coupled VLIW (very-long-instruction-word) processor and a coarse-grained, reconfigurable array. The architecture template consists of computational, storage, and routing resources. The routing resources connect the computational and storage resources in a topology to form the ADRES array. Data accesses to the memory of the unified architecture take place through load/store operations. A script-based technique allows designers to generate instances by specifying values for the communication topology, supported operation set, resource allocation, and timing of the target architecture.