Nios II/e (economy)

Targets: Automotive, Consumer, Industrial, Medical

Altera Nios II/e (economy) Block Diagram

Altera's Nios II/e "economy" processor core uses the fewest FPGA logic and memory resources, making it the lowest-cost Nios II processor core available. The Nios II/e core has higher performance but is in the same cost class as a typical 8051 architecture, achieving over 30 DMIPS at up to 200 MHz operation while using fewer than 700 LEs (logic elements). The Nios II Embedded Design Suite, including the Eclipse-based Nios II Integrated Development Environment, supports development with the core.

The Nios II/e core features access to up to 2-Gbytes of external address space, a JTAG debug module with optional enhancements, and support for up to 256 custom instructions. The Nios II/e core targets cost-sensitive applications, and it is often paired with Altera's low-cost FPGAs and structured ASIC products.

Some common uses for Nios II processors in automotive applications are as graphics processors with hardware acceleration, central gateway controllers, driver assistance systems, and audio processing.