STMicroelectronics

STMicroelectronics


SPEAr

Targets: Audio, Communication & Wired, Computers & Peripherals, Consumer, Digital Power, General Purpose, Industrial, Medical, Mobile & Wireless, Motor Control, Security, Test & Measurement

ST's SPEAr family of embedded microprocessors target networked devices used for communication, display, and control. The SPEAr family uses a 333 MHz ARM926EJ-S core that supports operating systems like Linux, sophisticated user interfaces, and micro-browsers. Devices include 16-kbytes of data cache, 16-kbytes of instruction cache, JTAG, and ETM (embedded trace macrocell) for debug operations.

STMicroelectronics SPEAr300 Block Diagram

The SPEAr300 design targets human-machine interface (HMI) applications, VoIP, security, and consumer applications. It features a high-performance 8-channel DMA, a C3 cryptographic accelerator, real-time clock, watchdog, system controller, JPEG accelerator, ADC, and up to 44 GPIOs. It includes 32-kbytes of ROM, up to 57-kbytes of SRAM, as well as external memory management of LPDDR2, DDR2, SRAM, and NAND/NOR Flash memories. Connectivity peripherals include USB 2.0, Ethernet, SPI, I²C, I²S, UART, IrDA, and TDM Bus.

The EVALSPEAr300 evaluation board is a complete development platform for SPEAr300. It integrates a SPEAr300 embedded microprocessor, two USB 2.0 hosts, one USB 2.0 device port and Ethernet MAC. Features include serial and parallel Flash, DDR2 memory, USB 2.0, fast Ethernet, SPI, Fast IrDA, I2C, UART port SD card interface, and LCD expansion board connector. The board features JTAG and ETM connectors.

STMicroelectronics SPEAr310 Block Diagram

The SPEAr310 design targets telecom applications. It features a high-performance 8-channel DMA, a C3 cryptographic accelerator, real-time clock, watchdog, system controller, JPEG accelerator, ADC, and up to 102 GPIOs. It includes 32-kbytes of ROM, up to 8-kbytes of SRAM, as well as external memory management of LPDDR2, DDR2, SRAM, and NAND/NOR Flash memories. Connectivity peripherals include USB 2.0, Ethernet (one MII and four SMII), TDM bus, HDLC, SPI, I²C, UART, and IrDA.

The EVALSPEAr310 evaluation board is a complete development platform for SPEAr310. It integrates a SPEAr310 embedded microprocessor, two USB 2.0 hosts, one USB 2.0 device port, and Ethernet MAC. Features include serial NOR Flash, parallel NOR, NAND Flash, DDR2 memory, USB 2.0, fast Ethernet, SPI, Fast IrDA, I2C and UART ports. Available as an option are HDLC-RS485, HDLC-E1 and HDLC-TDM interfaces. The board features a JTAG connector.

STMicroelectronics SPEAr320 Block Diagram

The SPEAr320 design targets factory automation, printers, and consumer applications. It features a high-performance 8-channel DMA, a C3 cryptographic accelerator, real-time clock, watchdog, system controller, JPEG accelerator, ADC, and up to 102 GPIOs. It includes 32-kbytes of ROM, up to 8-kbytes of SRAM, as well as external memory management of LPDDR2, DDR2, SRAM, and NAND/NOR Flash memories. Connectivity peripherals include USB 2.0, Ethernet (two MII/SMII), standard parallel port, SPI, I²C, UART, IrDA, and CAN.

The EVALSPEAr320PLC evaluation board is a development platform for the SPEAr320, in its MII mode configuration, with a focus on PLC (Programmable Logic Controller) applications. The kit uses a two-board approach. The first board is a generic CPU board integrating a SPEAr320 embedded microprocessor, two USB 2.0 hosts, one USB 2.0 device port, the memory subsystem (DDR2 and Flash), and JTAG connector. The second board is a PLC application board featuring 2 Ethernet ports, 2 CAN ports, 3 UARTs (RS232 and 485), SPI and I2C ports, LED, ADC and micro SD card interfaces. This board includes digital input/output serial/parallel connectors with a pinout compatible with many existing evaluation boards from ST.

STMicroelectronics SPEAr600 Block Diagram

The SPEAr600 offers dual 333MHz ARM926EJ-S cores that can support general-purpose and dedicated real-time processing. The SPEAr600 local bus can be externalized so that external peripherals can be added to the system. It features a high-performance 8-channel DMA, a C3 cryptographic accelerator, real-time clock, watchdog, system controller, JPEG accelerator, ADC, and up to 10 GPIOs. It includes 32-kbytes of ROM, up to 8-kbytes of SRAM, as well as external memory management of DDR1, DDR2, and NAND/NOR Flash memories. Connectivity peripherals include USB 2.0, Giga-Ethernet, SPI, I²C, I²S, UART, and IrDA. The SPEAr600 also supports LCD panels and touchscreens.

The EVALSPEAr600 evaluation board demonstrates device capabilities, features, and peripherals by integrating a SPEAr600 embedded microprocessor (dual ARM 926EJ-S core) with two USB 2.0 hosts, one USB 2.0 device port, and a Giga-Ethernet MAC. Features include serial and parallel Flash, DDR2 memory, USB 2.0, Giga-Ethernet, SPI, Fast IrDA, I2C, UARTs and LCD expansion board connector. The board features JTAG and ETM connectors.

STMicroelectronics SPEAr Product News:

July 29, 2010 -
June 9, 2010 -
May 27, 2010 -
March 31, 2010 -
March 15, 2010 -
February 25, 2010 -