MIPS Technologies

MIPS Technologies


Targets: Automotive, Consumer, Industrial, Mobile & Wireless

MIPS Technologies M14K Block Diagram

The MIPS32 M14K core incorporates the microMIPS code compression Instruction Set Architecture (ISA). microMIPS offers MIPS32 performance with equivalent 16-bit code density. A superset of the MIPS32 M4K core, the M14K core is fully compatible with MIPS32 Release 2 Architecture. It retains virtually all features of the M4K core, including 32 General Purpose Registers (GPRs), support for shadow register sets, SRAM-type interface controller, MMU (Memory Management Unit) and a high performance Multiply/Divide Unit (MDU). The core design is based on the 5-stage pipeline 4K micro-architecture, providing a performance efficiency of 1.5DMIPS/MHz. The M14K core can achieve a production frequency of 180 MHz in a 130nm standard process.

The M14K core incorporates design enhancements and application-specific features that are optimized for flash-based microcontrollers and real-time embedded control applications. Application-specific features for microcontrollers accelerate access to flash memory, enhance the interrupt handling mechanism, and add atomic bit instructions. Designers can leverage an optional AMBA AHB-Lite interface, providing a standard interface to a wide range of compatible peripherals. MIPS Technologies provides advanced debug and profiling features. Integrated software and hardware development tools and an ecosystem of third party partners support the M14K core.