Synopsys

Synopsys


DesignWare ARC 750D

Targets: Automotive, Communication & Wired, Computers & Peripherals, Consumer, Imaging & Video, Mobile & Wireless

The configurable, 7-stage ARC 750D core is suitable for complex system-on-chips (SoCs) running Linux or other high-end operating systems. It is an application processor targeting home entertainment systems, portable devices such as smartphones and PDAs, automotive telematics systems, and information-based products. In addition, custom extensions may optionally be incorporated to achieve higher application performance levels. The MMU-based memory subsystem supports Linux and other high-end operating systems. The configurable architecture allows SoC designers to include only the processor features that are required for their specific application. User-defined instruction and register extensions can deliver 5 to 100 times performance improvement of critical routines.

Built-in DSP features include instruction and register extensions that accelerate signal processing algorithms. The optional ARC XY Advanced DSP subsystem delivers the performance of dedicated DSP cores, allowing external logic and DSP blocks to be eliminated. The ARCompact 16-/32-bit Instruction Set Architecture reduces code size by up to 40 percent compared to 32-bit only instruction sets. The JTAG debug port and optional embedded hardware breakpoints facilitate software debug. The ARC 750D core is delivered as synthesizable RTL source code (Verilog), and it is fully compatible with industry standard design methodologies and tool flows.