Targets: Audio, Consumer, Mobile & Wireless


The ARM7TDMI and ARM7TDMI-S cores are not recommended for new designs. They are a 32-bit embedded RISC processor core delivered as a hard macrocell or synthesizable core. The ARM7TDMI core enables system designers to build embedded devices requiring small size, low power and high performance. The ARM7TDMI core is available via the ARM Foundry Program. The generic layout can be ported specific process technologies.

The ARM7TDMI core is a high-volume 32-bit RISC architecture that delivers up to 100 MIPS performance with a small die size, low power consumption, and high code density (comparable to 16-bit microcontroller). The core supports a range of operating system and RTOSes, a choice of development tools, sign off models for EDA environments, debug support for SoC designers, migration and support across new process technologies, and it supports a code-compatible upward migration path to ARM9 and ARM10 families.

The ARM7TDMI supports the Thumb instruction set, which is an extension of the 32-bit ARM architecture. Thumb instructions are a subset of the most commonly used 32-bit ARM instructions, which have been compressed into 16-bit opcodes. On execution, these 16-bit instructions are decompressed to 32-bit ARM instructions in real time without performance loss. Designers can use both 16-bit Thumb and 32-bit ARM instructions sets and therefore have complete flexibility to compile for maximum performance or minimum code size on a subroutine level as their applications require.

DSM (Design Sign-off Models) are available for a variety of simulation environments, and allow HDL simulation of ASIC and ASSP devices incorporating an ARM7TDMI core. The ARM7TDMI core also includes on-chip EmbeddedICE logic that enables access to the core for debug purposes.