Targets: General Purpose

Tensilica 233L Block Diagram

The Diamond Standard 233L is a high-performance, fully synthesizable 32-bit RISC controller core. It is area and power efficient with a local memory architecture, and a full-featured MMU (memory management unit) for application processing using operating systems such as Linux. The caches are 16-kbyte instruction and data, 4-way set associative.

The MMU provides instruction and data TLBs (translation lookaside buffers), which manage virtual-to-physical address mapping. In addition to address translation, the MMU provides four different privilege levels (for memory protection), variable page sizes, and multiple access modes. Combining the MMU with a flexible interrupt architecture and high performance, the Diamond 233L can target complex systems running numerous operations.

Arithmetic and DSP hardware support in the processor reduces the need to include a separate DSP in the system design. A built-in 32x32 multiplier and 32-bit integer divider provide arithmetic support. DSP support in the Diamond 233L consists of a single-cycle 16x16-bit MAC unit adding four dedicated 32-bit registers and a 40-bit accumulator. Additionally, there is support for zero overhead looping, clamps (saturating arithmetic), max/min value, normalize, and sign extend.