Xtensa 8

Targets: General Purpose

Tensilica Xtensa 8 Block Diagram

Tensilica's Xtensa 8 processor is a configurable, extensible and synthesizable 32-bit RISC processor core. The Xtensa 8 processor targets control-plane as well as data-plane SoC applications. By selecting and configuration predefined elements of the architecture and by inventing completely new instructions and hardware execution units, the Xtensa 8 processor can deliver performance levels orders of magnitude faster than standard 32-bit processor cores. Designers define new instructions utilizing the TIE (Tensilica instruction extension) methodology, adding Verilog-like descriptions of datapaths, execution units, and register files that can deliver performance, area, and power characteristics equivalent to custom logic design.

Before committing to silicon, system designers can explore multiple architectures by making area, speed, power, and code-density design tradeoffs based on real-time feedback from the Xtensa Xplorer environment. The Xtensa Processor Generator automatically creates tailored, application-specific embedded processors along with a matching software tool chain. Pre-verified, correct-by-construction RTL generation lowers verification efforts.