Targets: General Purpose

Tensilica 545CK Block Diagram

The 545CK is a combination of a 32-bit RISC controller and a high-performance DSP in a single licensable IP core. It eliminates the need to develop SoCs with separate control and DSPs. The 545CK, which combines a base CPU controllers and a DSP containing eight parallel 16-bit single-cycle MAC units, allows system control and data processing throughput in a single core with a single compiler and single instruction stream. The Diamond 545CK can sustain eight simultaneous MAC operations on independent data pairs per cycle, utilizing the 160-bit vector registers.

As in all Xtensa ISA-based architectures, 16-, 24- and 64-bit VLIW instruction bundles can be freely intermixed in the instruction stream with no processor mode switching to decrease performance. All software development tools (compiler, linker, debugger, instruction set simulator) enable access to DSP-related and control hardware through standard C/C++ source code.

In addition to the parallel multiplier hardware, the Diamond 545CK includes support for other DSP-related operations, such as zero-overhead looping, clamps (saturating arithmetic), max/min value, normalize, and sign extend.